1. Design/Verify/Optimize all analog circuit blocks used in memory product, including bandgap reference, amplifier, LDO, charge pump, PLL etc.
2. Guide layout designer to floorplan/implementation the layout and take responsibility of post layout simulation.
3. Design the circuit for test, mainly focus on the analog part but not limited.
4. Design high speed IO circuit with equalization tech implemented (DFE, CTLE etc), make the transmission line model and verify the signal integrity.
5. Provide support to PE for silicon test/debug
Requirement
1. Good knowledge and deep understanding CMOS circuit design.
2. Familiar with EDA design tools such as spectre, hspice, finesim, Virtuoso etc.
3. Experience in high-speed IO design is preferred.
4. Experience in mix-signal circuit design, or fullchip analog circuits system plan/implement, DRAM memory design is preferred.
5. Good team player and communication skills.
6. Good learning competency, self-motivated in a flexible and dynamic environment.