Senior Principal Design Engineer
4-5万
 上海-普陀区
 无需经验
 全职
 更新于04-17
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职位信息

POSITION OVERVIEW:
The experienced candidate with suitable skills is required to carry out key tasks and to meet the deadline of the project. The successful candidate will work with high power chip technology development team to design and develop state-of-the-art technology and deliver world-class high-power chips on the market.
KEY RESPONSIBILITIES:
61Responsible to build technology platform for power device (IGBT/FRD) design and new technology development to meet customer requirement in a manufacturable and cost-effective way
61Responsible to improve the device overall performance for the existing products, in particular, to improve the device reliability and robustness
61Performing TCAD process and device simulations, and layout design
61Creating and maintaining design rules and generation rules when required using controlled procedures
61Responsible for engineering device test (static, dynamic, reliability, etc) and data analysis, part of manually testing might be involved
61Responsible to guide and work with chip and other function teams to meet timely deliveries
61Train and advance the skills of existing technical employees to expand their capability and responsibility
61Experience of IGBT design for EV/HEV application preferred
61Encourage and manage the process of producing technical publications and invention patents.
SKILLS/COMPETENCIES
(Top 3-7 most important/critical competencies needed for the job both soft and hard skills):
Hard Skills:
61Hand-on experience in power device design and technology development, fine geometry trench and thin wafer technology are necessary, 12” experience is a plus
61Proficiency in TCAD process and device simulation
61Understanding of power device physics, fabrication and characterization principles.
61Knowledge and experience in design for reliability and robustness of power devices.
61Ability to address design and engineering issues and to provide suitable solutions
61More than 8 years working experience in IGBT (or FRD) design and/or processing
61Proficient in reading English literature and writing in English
Soft Skills:
61Leadership skills in building and leading project teams in a global, intercultural environment– “exemplified engagement”.
61Master’s degree or above, major in Microelectronics or semiconductor related
61Good Communication skills in both oral and written English
Talent acquisition based on Nexperia vacancies is not appreciated. Nexperia job adverts are Nexperia copyright
© material and the word Nexperia® is a registered trademark.
Nexperia is an Equal Opportunity/Affirmative Action Employer.
职位要求:
Same as above.
个人信息处理规则声明
Nexperia高度重视对求职者个人信息的保护。为招聘目的,Nexperia及其委托的第三方机构会通过招聘平台获取求职者的求职意向和简历,并将以邮件或短信等方式联系求职者,以征求您对Nexperia与招聘相关的个人信息保护政策的同意。敬请您留意相关邮件或短信。如您对我们的相关个人信息处理规则有任何疑问,或希望查阅、复制、转移、更正、补充或删除其个人信息的,均可通过我们在个人信息保护政策中留下的方式联系我们。为保障个人信息安全,我们可能会先要求验证您的身份,再处理相关请求。
请您仔细阅读并确认您已经充分理解本声明的内容,在确认充分理解并同意后再向我们提供您的简历信息或其他个人信息。如您向我们提供您的简历信息或其他个人信息的,则视为您已经充分理解并同意我们可以按照本声明所述的目的和方式以及Nexperia与招聘相关的个人信息保护政策处理您的个人信息(包括敏感个人信息)。如您对此有任何疑问或者不同意,请勿提交简历信息或其他个人信息。
工作地址
 闻天下创新中心
应届生安全提醒
求职过程中如果遇到违规收费、信息不实、以招聘名义的培训收费或者微信营销等虚假招聘行为,请保留证据,维护自己的合法权益。谨防上当受骗!
公司信息
闻泰科技旗下的安世半导体是全球知名的半导体IDM公司,是原飞利浦半导体标准产品事业部,有60多年半导体研发和制造经验,总部位于荷兰奈梅亨,晶圆制造工厂在英国曼彻斯特、新港和德国汉堡,封装测试工厂位于中国东莞、菲律宾卡布尧和马来西亚芙蓉。客户超过2.5万个,产品种类超过1.5万种,每年新增800多种新产品,全部为车规级产品。
作为一家拥有完整芯片研发设计、晶圆制造、封装测试的大型垂直半导体(IDM)企业,安世半导体在全球拥有11000名员工,客户包括汽车、通信、消费等领域耳熟能详的国际知名企业。2020年,安世半导体全年生产总量超过1000亿颗。
作为一家专注于半导体开发和自有生产的全球知名公司,安世提供众多职位,让员工可以获得职业发展,迎接富有意义的挑战。
我们拥有:
1. 五天八小时工作制,享有法定假日、带薪年假(每年年假不少于15日)
2. 六险一金,年底双薪
3. 欧洲企业文化,国际化工作氛围
4. 强有力的培训支持,统一的核心课程系统
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img安世半导体(中国)有限公司
外资(欧美)
10000人以上
电子技术/半导体/集成电路
这个岗位看重985,211吗?
不确定呢
还是已提交,有别的进度的吗
会通知简历过了
这个有截止日期吗
这个具体也不清楚啊 没说具体截止日期 可以去公众号看看
下载App 参与互动