NPI & IP Engineering Engineer
The NPI and IP Engineering Engineer is responsible for championing NVM (Non - Volatile Memory) in the mixed signal process and managing NVM & Fundamental IP.
Responsibilities:
61Assist the development and integration of non-volatile memory (NVM, e.g., eFlash/MTP) and fundamental IP (ADC/PLL) in Mixed Signal processes, ensuring IP performance and reliability.
61Coordinate with EDA vendors to complete IP toolchain qualification, promote IP porting across process nodes, and support rapid new product introduction.
61Develop test and validation plans for NVM IP, resolve technical conflicts during integration, and provide technical support for mass production.
Requirements:
61Bachelor's degree or above in Electrical Engineering, Microelectronics, or related fields; 3+ years of NVM/IP development experience.
61Proficient in ARM/Synopsys IP integration methodologies; experience in Mixed Signal process tape-out; knowledge of IP protection and version management.
61Technical leadership capabilities: able to lead cross-team projects and drive end-to-end implementation of complex IP from design to mass production.
61Proficient in English; capable of leading technical negotiations and collaborations.
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D&I Statement
As an equal-opportunity employer, Nexperia values diversity not just because it is the right thing to do but because diverse teams perform better. We are dedicated to being inclusive, and a proof point of this dedication is that we were the main partner of the very *** Dutch Paralympic Team NL House during the Paris 2024 Paralympic Games. Our recruitment process is inclusive and accessible to all, and we consider all applicants fairly, as well as providing a safe work environment and reasonable adjustments where requested.
In addition, we offer our colleagues the possibility to join employee resource groups such as the Pride Network Group or global and local Women's groups. Nexperia is committed to increasing women in management positions to 30% by 2030.
职位要求：
Same as above.
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