Process Technology Engineer
1-2万
 上海-闵行区
 1年及以上
 硕士
 包装设计
 全职
 更新于05-23
五险一金
补充医疗保险
带薪年假
带薪病假
年终奖金
绩效奖金
专业培训
免费班车
免费工作餐
定期团建
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职位信息

岗位职责:
61 Process Technology Development:
89 Develop, qualify, and optimize sawing/singulation processes (mechanical dicing, laser dicing, stealth dicing) for NAND Flash packaging (e.g., BGA, CSP, HBM, HBF, multi-die stacks product…).
89 Investigate new blade materials, dicing parameters, and sawing technologies to minimize chipping, cracking, delamination and other mechanical challenges.
89 Collaborate with material suppliers & equipment vendors to evaluate next-generation dicing solutions.
61 Module Excellence:
89 Resolve critical technical challenges & address critical defects (chipping, burrs, cracks, street residuals…) by using innovation & breakthrough ideas.
89 Drive optimization of process flows, parameter, material, and DFM enhancements.
89 Conduct DOE (Design of Experiments) to refine process parameters (spindle speed, feed rate, blade type, power …) for high process capability & high product performance.
61 New Process/Product Introduction:
89 Lead new process setup and oversee technical reviews during NPI phases to ensure rapid ramp-up to high-volume production.
89 Phase review management to ensure new product/process on schedule delivery.
89 Contribute to advanced packaging roadmaps (e.g., thinner dies, higher die counts, 3D NAND integration, HBM, HBF…).
教育背景Education
Master’s degree in Electrical Engineering, Material Science, Mechanical Design Engineering, Physics and
Chemistry Engineering, or other simi-conductor related field.
知识Knowledge
*职位要求的信息或知识范围 Statement of the Informational or conceptual framework required by the Job
61 Be familiar with the process flow of NAND packaging, including but not limited to the process requirements and machine settings of sawing/singulation processes.
61 Demonstrated proficiency in utilizing diverse quality management methodologies and advanced data analysis software solutions.
61 Candidates with semiconductor fabrication (Fab) or advanced packaging experience are strongly preferred, with demonstrated understanding of key advanced packaging technologies including TSV, TC-NCF, MR-MUF, micro bumping and interposer.
61 Preference will be given to applicants with hands-on experience in HBM and HBF technologies.
相关工作经验Experiences
61 3+ years of experience in semiconductor assembly process/product engineering or other related.
61 Strong knowledge of assembly processes (especially on sawing/singulation related).
61 Experience in new product or process technology development is a plus.
其他胜任力Competencies & Soft Skill
61 MDI - Mindset of Disruptive Innovation
61 Good English skill, both written and oral
61 Strong self-learning motivation, and excellent communication and teamwork skills.
61 Knowledge of Lean Manufacturing/Six Sigma is a plus.
61 Experience in automation/intelligent manufacturing is a plus.
工作地址
 江川东路388号
应届生安全提醒
求职过程中如果遇到违规收费、信息不实、以招聘名义的培训收费或者微信营销等虚假招聘行为,请保留证据,维护自己的合法权益。谨防上当受骗!
公司信息
晟碟半导体(上海)有限公司于2006年8月注册成立于上海市闵行区紫竹高新区。公司主要从事先进闪存存储产品的研发、封装和测试,是全球规模较大的闪存存储产品封装测试工厂之一。公司生产的产品类型主要包括SD、MicroSD、iNAND闪存模块等。自2008年起公司连续10年被上海市商务委员会、上海市外商投资企业协会评选为上海市优秀外商投资企业,并在这些年度连续名列上海市外商投资企业进出口额前20名,其中2014年度起每年起均名列上海市外商投资企业进出口额百强企业前10名。同时公司还连续8年被上海市集成电路行业协会评为上海市集成电路封装测试企业销售额前10名,2016年、2017年及2018年公司均被中国半导体行业协会评为中国十大半导体封装测试企业。
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