职位名称：数字后端设计工程师
职位描述：
根据个人情况和公司项目规划，承担如下一种或多种职责：
1. 完成编写时序约束，编写低功耗设计文件（UPF/CPF），逻辑综合/物理综合，形式验证，静态时序分析，功耗分析，低功耗设计规则检查（CLP）；
2. 完成布局规划，电源规划，布图布线，物理验证，电压降分析，电迁移分析；
3. 完成DFT逻辑设计和验证，完成编写DFT模式时序约束，帮助DFT模式时序收敛，帮助芯片bring-up，完成测试向量的调试，良率的提升；
4. 为客户/现场应用工程师/销售人员提供技术支持。
职位要求：
1. 电子工程硕士或更高学历；
2. 学习勤奋，工作积极投入；
3. 具备以下单项或多项经验: 从RTL到GDS的设计实现，芯片级测试，ASIC编码和模拟，ASIC物理版图，集成电路制造和工艺；
4. 富有事业心和团队合作精神，良好的中英文听说读写能力。
工作地点： 上海/成都/南京
Title: Physical Design Engineer
Responsibilities:
You will be in a position responsible for one or more of below assignments:
1. Complete writing timing constraint, writing UPF/CPF, logic/physical synthesis, formal verification, STA, power analysis, CLP.
2. Complete floorplan, power plan, P&R, physical verification, IRDrop analysis, EM analysis.
3. Complete DFT logic design and verification, writing DFT mode timing constraint, support DFT mode timing closure, support chip bring-up, complete test pattern debugging and yield improvement.
4. Provide technical support for customer/FAE/sales.
Requirements:
1. Master's or above degree in EE or above.
2. Study hard and work actively.
3. Have following single or multiple experiences: design implementation from RTL to GDS, chip level testing, ASIC coding and simulation, ASIC physical layout, IC manufacture and process.
4. Self-motivated and a good team player. Good communication skills in both Chinese and English in either listening, speaking, reading or writing.
Location: Shanghai/Chengdu/Nanjing